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STL to SCL conversion
Posted: Thu Jan 09, 2020 3:17 pm
by stl2sclSupport
This service allows to convert/decompile your STL code made in Simatic Step 7 to readable SCL code.
It is alpha version.
Tested on decompilation of STL (AWL) files created by SCL compiler v5.3-5.6.
Waiting for your feedback and suggestions!
Re: STL to SCL conversion
Posted: Thu Jan 16, 2020 12:31 pm
by Draco Malfoy
Very interesting. How can i purchase the product with fully support ? I have actually allways the "internal server error" if i try to recompile blocks from sources inside of your demo version.
I have also many questions, how it should work. Maybe you can answer to it, and make clear, that your product is a reliably solution in different usecases.
1. How your programm will treat the lost Views on a Variable, build by usind the Operator "AT" ? Will generate possible views, or generate an error, or ask the operator ?
2. Whats happen, if your programm recover an acces to a system function, or acces to a third party funktion block in the code ? How it will be reconstructed ?
3.Its a citation from your page:
"supported operation systems: Windows (XP and newer), MacOS, Linux. Contact us to get desktop version with
contact@stl2scl.com."
i'm sorry, but.. what ?? Supported operating system - Linux and MacOS ?? Since witch time SIMATIC Manager and Siemens programming tools support Linux or MacOS ?? I will never believe that you have developed a fully working recompiler for operating systems, in witch such products normally never will be used.
It seems like the web-demo were only a web interface for this one tool:
http://plc4good.org.ua/view_post.php?id=100
Re: STL to SCL conversion
Posted: Thu Jan 16, 2020 4:44 pm
by stl2sclSupport
Thank your for your response!
The converter is cross-platform so you can use it on any of mentioned operation systems.
We have some limitations for the online version in error messages. Sometimes it may not be clear from the messages what is going wrong. Thus, you can follow these steps:
1. Check that you did not change original AWL code. Sometimes it can happen that minimal changes can cause errors.
2. Verify your compiler version. We have tested our code on SCL compiler v5.3-5.6. Other compiler versions support is in development.
3. It could be a bug in code, so if your still get an error, than your can send us an example of code that does not work on
contact@stl2scl.com. Our engineers will do their best to solve an issue.
1. AT variables are created automatically in the necessary sections of the VAR areas, if necessary.
Code: Select all
FUNCTION_BLOCK FB 1
TITLE =
VERSION : 0.0
VAR
s : STRUCT
x1 : INT ;
x2 : INT ;
END_STRUCT ;
END_VAR
BEGIN
NETWORK
TITLE =SCL network
//compiled by SCL compiler version: SCLCOMP K05.03.06.00_01.03.00.01 release
SET ;
SAVE ;
= L 0.1;
L B#16#2;
T DIB [AR2,P#0.0];
SAVE ;
BE ;
END_FUNCTION_BLOCK
Code: Select all
FUNCTION_BLOCK FB1
TITLE = ''
VERSION : '0.0'
VAR
s : STRUCT
x1 : INT ;
x2 : INT ;
END_STRUCT ;
s_BYTE AT s : ARRAY[0 ..3] OF BYTE;
END_VAR
BEGIN
s_BYTE[0]:=B#16#2;
END_FUNCTION_BLOCK
2. SFB and SFC are supported (in the current version, not all, but in the near future we will add the remaining ones).
Code: Select all
FUNCTION_BLOCK FB 10
TITLE =
VERSION : 0.0
VAR_INPUT
x : STRUCT
x1 : INT ;
x2 : INT ;
x3 : INT ;
x4 : INT ;
x5 : INT ;
END_STRUCT ;
END_VAR
VAR_OUTPUT
y : STRUCT
x1 : INT ;
x2 : INT ;
x3 : INT ;
x4 : INT ;
x5 : INT ;
END_STRUCT ;
err : INT ;
END_VAR
BEGIN
NETWORK
TITLE =SCL network
//compiled by SCL compiler version: SCLCOMP K05.03.06.00_01.03.00.01 release
SET ;
SAVE ;
= L 0.1;
L DW#16#1002000A;
T LD 2;
L DINO;
T LW 6;
TAR2 ;
+ L#0;
T LD 8;
L DW#16#1002000A;
T LD 12;
L DINO;
T LW 16;
TAR2 ;
+ L#80;
T LD 18;
TAR2 LD 22;
UC SFC 20 {
P#L 2.0,
P#L 26.0,
P#L 12.0};
LAR2 LD 22;
L LW 26;
T #err;
A L 0.1;
SAVE ;
BE ;
END_FUNCTION_BLOCK
Code: Select all
FUNCTION_BLOCK FB10
TITLE = ''
VERSION : '0.0'
VAR_INPUT
x : STRUCT
x1 : INT ;
x2 : INT ;
x3 : INT ;
x4 : INT ;
x5 : INT ;
END_STRUCT ;
END_VAR
VAR_OUTPUT
y : STRUCT
x1 : INT ;
x2 : INT ;
x3 : INT ;
x4 : INT ;
x5 : INT ;
END_STRUCT ;
err : INT ;
END_VAR
BEGIN
err:=SFC20(SRCBLK:=x,DSTBLK:=y);
END_FUNCTION_BLOCK
No, we don't use
http://plc4good.org.ua project.
Re: STL to SCL conversion
Posted: Thu Jan 16, 2020 4:59 pm
by Draco Malfoy
I've tested your online recompiler with different code-samples and i have the following fixing now:
- Your software ist not able to recognize simple loops like FOR, WHILE etc.
- Your software simply ignore parts of original code
- Your software does not recompile the IF...THEN...ELSE statements
However, i've send you an Email with a code example witch i need to recompile. If you can show me that your solution works in this case, i may be interested to buy the programm.
stl2sclSupport wrote:
The converter is cross-platform so you can use it on any of mentioned operation systems.
It doesn make sense for me. No one living man use Siemens Automation on Linux or MacOS, all the Siemens Software Solutions working exclusively on Windows systems.
Re: STL to SCL conversion
Posted: Thu Jan 16, 2020 5:19 pm
by stl2sclSupport
1. Loops are supported. Code created with FOR and WHILE statements decompiled as WHILE statement. Code, created with REPEAT statement decompiled as REPEAT statement.
Code: Select all
FUNCTION_BLOCK FB 7
TITLE =
VERSION : 0.0
VAR
x : REAL ;
i : INT ;
END_VAR
BEGIN
NETWORK
TITLE =SCL network
//compiled by SCL compiler version: SCLCOMP K05.03.06.00_01.03.00.01 release
SET ;
SAVE ;
= L 0.1;
A7d0: L #i;
L 10;
<I ;
JCN A7d1;
L #x;
L 3.000000e+000;
+R ;
JO I007;
JU I008;
I007: CLR ;
= L 0.1;
I008: T #x;
L #i;
L 1;
+I ;
JO I009;
JU I00a;
I009: CLR ;
= L 0.1;
I00a: T #i;
JU A7d0;
A7d1: CLR ;
A L 0.1;
SAVE ;
BE ;
END_FUNCTION_BLOCK
Code: Select all
FUNCTION_BLOCK FB7
TITLE = ''
VERSION : '0.0'
VAR
x : REAL ;
i : INT ;
END_VAR
BEGIN
WHILE i<10 DO
x:=x + 3.000000e+000;
i:=i + 1;
END_WHILE;
END_FUNCTION_BLOCK
IF, ELSE, CASE are suppored.
Here is an example of SСL code (we do not give STL because it will be long) that you can try to compile and then try to decompile.
Code: Select all
FUNCTION_BLOCK FB4
TITLE = ''
VERSION : '0.0'
VAR
x : REAL ;
y : REAL ;
i : INT ;
b1 : BOOL ;
b : BOOL ;
END_VAR
BEGIN
IF b THEN
IF NOT b THEN
y:=1.000000e+000;
IF NOT b1 THEN
y:=2.000000e+000;
ELSE
y:=3.000000e+000;
END_IF;
IF NOT b1 THEN
y:=4.000000e+000;
ELSE
IF NOT b1 THEN
y:=5.000000e+000;
ELSE
y:=6.000000e+000;
END_IF;
y:=7.000000e+000;
END_IF;
ELSE
IF NOT b1 THEN
y:=8.000000e+000;
ELSE
y:=9.000000e+000;
END_IF;
y:=1.000000e+001;
END_IF;
IF NOT b1 THEN
y:=1.100000e+001;
ELSE
y:=1.200000e+001;
END_IF;
END_IF;
END_FUNCTION_BLOCK
Code: Select all
FUNCTION_BLOCK FB1
TITLE = ''
VERSION : '0.0'
VAR
x : REAL ;
y : REAL ;
i : INT ;
END_VAR
BEGIN
CASE i OF
1:
IF x<0.000000e+000 THEN
y:=1.000000e+001;
END_IF;
2:
IF x>0.000000e+000 THEN
y:=2.000000e+001;
END_IF;
3:
IF x=0.000000e+000 THEN
y:=3.000000e+001;
END_IF;
ELSE:
y:=5.000000e+002;
END_CASE;
END_FUNCTION_BLOCK
Try to complicate these examples, everything should work)
Re: STL to SCL conversion
Posted: Thu Jan 16, 2020 5:41 pm
by Draco Malfoy
Ok, very well. Please look at my Email and give me feedback. My Trials with different Blocks from real librarys was'nt succesvull until now. Additionaly, i dont know with witch compiler options they was compilated in the original. But the version of SCL compiler should be correct.
Something let me suggest, that i will never receive a reply on my email.
here is my Sample-FB with witch i've tryed:
https://mega.nz/#!hY82wAKQ!nmtZCTq4I3fM ... UAnv1YawZA
Are you able to recompile it with your program ? Thanks
What i do not understand, for example, this simple code
Code: Select all
FUNCTION_BLOCK "FbDrive"
TITLE =Channel Block for Motor Drives Telegramm1/20
{ S7_driver := 'chn'; S7_tasklist := 'OB100' }
AUTHOR : AdvLib90
FAMILY : Channel
NAME : FbDrive
VERSION : 9.0
VAR_INPUT
<...>
END_VAR
VAR_OUTPUT
<...>
END_VAR
VAR_IN_OUT
Mode : DWORD := DW#16#10; //Quality and mode
DataXchg : DWORD ; //Data exchange
DataXchg1 : DWORD ; //Data exchange
MS_Xchg : DWORD ; //Maintenance State exchange
END_VAR
VAR
sbRestart : BOOL := TRUE;
sdwRESERVE : DWORD ; //Reserve für zukünftige Änderungen
sCLSFailCounter : INT ;
sCLSCounter : INT ;
BytStatus : BYTE ; //Statusbyte für Ausgänge
LastByQuality : BYTE ;
END_VAR
VAR_TEMP
TOP_SI : STRUCT
EV_CLASS : BYTE ;
EV_NUM : BYTE ;
PRIORITY : BYTE ;
NUM : BYTE ;
TYP2_3 : BYTE ;
TYP1 : BYTE ;
ZI1 : WORD ;
ZI2_3 : DWORD ;
END_STRUCT ;
START_UP_SI : STRUCT
EV_CLASS : BYTE ;
EV_NUM : BYTE ;
PRIORITY : BYTE ;
NUM : BYTE ;
TYP2_3 : BYTE ;
TYP1 : BYTE ;
ZI1 : WORD ;
ZI2_3 : DWORD ;
END_STRUCT ;
pi_RET_VAL : INT ;
Status : BOOL ; //Status
FlutTm_t : DWORD ; //Flatterunterdrückungszeit
bTmpDXCHG : BOOL ; //BOOL für verrundung der DXCHG_xx 0 bit
BtMS07 : BOOL ; //Bool for MS State 07
BtMS06 : BOOL ; //Bool for MS State 06
tDXCHG : DWORD ;
tbCtrlSimStatus : BOOL ;
tFbDriveIn : ARRAY [0 .. 5 ] OF WORD ;
tIn0By : BYTE ;
tFbDriveOut : ARRAY [0 .. 1 ] OF WORD ;
RETURN_CODE : INT ; //Hilfsparameter (Wechselnde Bedeutung)!
by_dummy : BYTE ; //Hilfsparameter
w_dummy : WORD ; //Hilfsparameter
r_dummy : REAL ;
grad : REAL ;
MS_AS : DWORD ; //Maintenance State AS
xConditionMonitoring : BOOL ; //1=ConditionMonitoring
END_VAR
BEGIN
NETWORK
TITLE =SCL Netzwerk
//generiert vom SCL Übersetzer Version: SCLCOMP K05.03.08.03_04.01.00.01 release
SET ;
SAVE ;
= L 76.2;
L W#16#0;
T LW 78;
L DW#16#87000000;
T LD 80;
L W#16#0;
T LW 84;
L DW#16#87000060;
T LD 86;
TAR2 LD 90;
UC "RD_SINFO" {
P#L 24.0,
P#L 78.0,
P#L 84.0};
LAR2 LD 90;
L #TOP_SI.NUM;
L B#16#64;
==I ;
L #Mode;
L DW#16#10000;
UD ;
L DW#16#10000;
TAK ;
= L 76.3;
==D ;
O L 76.3;
SPBN A7d0;
SET ;
= #sbRestart;
A7d0: CLR ;
U L 76.2;
SAVE ;
BE ;
END_FUNCTION_BLOCK
It is the SFC6 "RD_SINFO" System function Call, witch is not supported by your programm ?
Here, for example:
Code: Select all
FUNCTION_BLOCK "MOD_D8_PN"
TITLE =PN Diagnostic Module Check (0 - 7 Channel)
{ S7_hardware := 'sm'; S7_alarm_ui := '1'; S7_tasklist := 'OB1,OB82,OB83,OB85,OB100,OB86'; S7_tag := 'false' }
AUTHOR : DRIVER90
FAMILY : '@SYSTEM'
NAME : MOD_D8_P
VERSION : 9.0
VAR_INPUT
[b][color=#FF0000]<... DETAILS SEE ATTACH ...>[/color][/b]
END_VAR
BEGIN
NETWORK
TITLE =SCL Netzwerk
//generiert vom SCL Übersetzer Version: SCLCOMP K05.06.00.00_06.01.00.01 release
SET ;
SAVE ;
= L 140.1;
CLR ;
= #EN_OUTP;
= #EN_ALRM;
= #sbRACKF;
L W#16#0;
T #OB_START;
L 0;
T #RETURN_CODE;
T #CHANNELS;
T #CHANNELS_OFFSET;
T #X;
T #y;
T #Z;
TAK ;
T #SZL_HEADER.LENTHDR;
T #SZL_HEADER.N_DR;
L B#16#0;
T #GEO_PN.SUBNET;
T #GEO_PN.RACK;
TAK ;
T #GEO_PN.SLOT;
T #GEO_PN.SUBSL_NO;
T #ZI1;
TAK ;
T #byQHL;
T #byQLL;
= #bMBSM;
= #bMBFM;
L DW#16#0;
T #ZI2_3;
T #CH_O;
T #CH_E;
T #CH_A;
T #EXT_S;
TAK ;
T #TOP_SI.EV_CLASS;
T #TOP_SI.EV_NUM;
T #TOP_SI.PRIORITY;
T #TOP_SI.NUM;
T #TOP_SI.TYP2_3;
T #TOP_SI.TYP1;
L W#16#0;
T #TOP_SI.ZI1;
L DW#16#0;
T #TOP_SI.ZI2_3;
T #tdwMS_AS;
T #tMS_XCHG;
= #bTmpDXCHG;
= #bTmpFlutter;
T #tDXCHG;
TAK ;
T #MOD_INF_TEMP.SUBN_ID_RACK_NO;
T #MOD_INF_TEMP.SLOT_NO_SUBSL_NO;
T #MOD_INF_TEMP.BASADR;
T #MOD_INF_TEMP.EXPECTYP;
T #MOD_INF_TEMP.ACTTYP;
T #MOD_INF_TEMP.RESERVE;
L B#16#0;
T #MOD_INF_TEMP.IOSTAT;
= #MOD_INF_TEMP.IOSTAT_0;
= #MOD_INF_TEMP.IOSTAT_1;
= #MOD_INF_TEMP.IOSTAT_2;
= #MOD_INF_TEMP.IOSTAT_3;
= #MOD_INF_TEMP.IOSTAT_4;
= #MOD_INF_TEMP.IOSTAT_5;
= #MOD_INF_TEMP.IOSTAT_6;
= #MOD_INF_TEMP.IOSTAT_7;
TAK ;
T #MOD_INF_TEMP.AREA_ID;
L DW#16#0;
T #tMODE;
= #tModfBg;
L 0;
T #intINDEX;
T #tiLen;
L W#16#0;
T #twHART_OB82;
T #twHART_OB1;
= #tbHART;
TAK ;
T #iRET_VAL;
TAK ;
T #wINFO1;
L DW#16#0;
T #dwINFO2;
= #MODF_BG_GONE;
= #tbCondMon;
T #tdwDXCHG1;
= #tbMaintAlarm;
= #tbMaintWarn;
= #tbMaintReqst;
L B#16#0;
T #-spam-;
L W#16#0;
T #twTextRef;
T #twChnNum_OB82;
T #twErrStat_OB82;
T #twErrTyp_OB82;
T #twChnNum_OB1;
T #twErrStat_OB1;
T #twErrTyp_OB1;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#6.0];
T LW 142;
L 1;
TAK ;
==I ;
SPB A7d1;
SPA A7d2;
A7d1: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#8.0];
T #TOP_SI.NUM;
SPA A7d0;
A7d2: L 2;
L LW 142;
==I ;
SPB A7d3;
SPA A7d4;
A7d3: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#9.0];
T #TOP_SI.NUM;
SPA A7d0;
A7d4: L 3;
L LW 142;
==I ;
SPB A7d5;
SPA A7d6;
A7d5: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#10.0];
T #TOP_SI.NUM;
SPA A7d0;
A7d6: L 4;
L LW 142;
==I ;
SPB A7d7;
SPA A7d8;
A7d7: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#11.0];
T #TOP_SI.NUM;
SPA A7d0;
A7d8: L 5;
L LW 142;
==I ;
SPB A7d9;
SPA A7da;
A7d9: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#12.0];
T #TOP_SI.NUM;
SPA A7d0;
A7da: L 6;
L LW 142;
==I ;
SPB A7db;
SPA A7dc;
A7db: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#13.0];
T #TOP_SI.NUM;
SPA A7d0;
A7dc: L 7;
L LW 142;
==I ;
SPB A7dd;
SPA A7de;
A7dd: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#14.0];
T #TOP_SI.NUM;
SPA A7d0;
A7de: L 8;
L LW 142;
==I ;
SPB A7df;
SPA A7e0;
A7df: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#15.0];
T #TOP_SI.NUM;
SPA A7d0;
A7e0: L 9;
L LW 142;
==I ;
SPB A7e1;
SPA A7e2;
A7e1: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#16.0];
T #TOP_SI.NUM;
SPA A7d0;
A7e2: L 10;
L LW 142;
==I ;
SPB A7e3;
SPA A7e4;
A7e3: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#17.0];
T #TOP_SI.NUM;
SPA A7d0;
A7e4: L 11;
L LW 142;
==I ;
SPB A7e5;
SPA A7e6;
A7e5: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#18.0];
T #TOP_SI.NUM;
SPA A7d0;
A7e6: L 12;
L LW 142;
==I ;
SPB A7e7;
SPA A7e8;
A7e7: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#19.0];
T #TOP_SI.NUM;
SPA A7d0;
A7e8: L 13;
L LW 142;
==I ;
SPB A7e9;
SPA A7ea;
A7e9: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#20.0];
T #TOP_SI.NUM;
SPA A7d0;
A7ea: L 14;
L LW 142;
==I ;
SPB A7eb;
SPA A7ec;
A7eb: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#21.0];
T #TOP_SI.NUM;
SPA A7d0;
A7ec: L 15;
L LW 142;
==I ;
SPB A7ed;
SPA A7ee;
A7ed: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#22.0];
T #TOP_SI.NUM;
SPA A7d0;
A7ee: L 16;
L LW 142;
==I ;
SPB A7ef;
SPA A7d0;
A7ef: L DIW [AR2,P#1714.0];
T LW 144;
TAK ;
AUF DB [LW 144];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L B [AR1,P#23.0];
T #TOP_SI.NUM;
SPA A7d0;
A7d0: L #TOP_SI.NUM;
L B#16#1;
==I ;
SPBN A7f1;
SET ;
= L 2.6;
L DIW [AR2,P#1720.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1722.0];
LAR1 ;
TAK ;
U [AR1,P#3.5];
= #sbRACKF;
CLR ;
O( ;
U #sbRACKF;
UN #QRACKF;
O ;
UN #sbRACKF;
U #QRACKF;
) ;
SPBN A7f4;
L #SUBN1_ID;
L B#16#FF;
==I ;
SPBN A7f3;
U #sbRACKF;
NOT ;
= #ACC_MODE;
A7f3: CLR ;
U #sbRACKF;
= #QRACKF;
SPA A7f4;
A7f1: L #TOP_SI.NUM;
L B#16#55;
==I ;
SPBN A7f5;
SET ;
= L 2.4;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#1550.0];
UW W#16#FF;
T #GEO_PN.SUBNET;
L W [AR1,P#1552.0];
UW W#16#FF;
T #GEO_PN.RACK;
L W [AR1,P#1554.0];
T #GEO_PN.SLOT;
L W [AR1,P#1556.0];
T #GEO_PN.SUBSL_NO;
L B [AR1,P#1538.0];
T #TOP_SI.EV_CLASS;
L D [AR1,P#1546.0];
T #ZI2_3;
SPA A7f4;
A7f5: L #TOP_SI.NUM;
L B#16#52;
==I ;
SPBN A7f6;
SET ;
= L 2.2;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#68.0];
UW W#16#FF;
T #GEO_PN.SUBNET;
L W [AR1,P#70.0];
UW W#16#FF;
T #GEO_PN.RACK;
L D [AR1,P#90.0];
L DW#16#FFFF0000;
UD ;
SRD 16;
T #GEO_PN.SLOT;
L D [AR1,P#90.0];
L DW#16#FFFF;
UD ;
SLD 16;
T #GEO_PN.SUBSL_NO;
L D [AR1,P#56.0];
T LD 52;
L D [AR1,P#60.0];
T LD 56;
L D [AR1,P#64.0];
T #TOP_SI.ZI2_3;
SPA A7f4;
A7f6: L #TOP_SI.NUM;
L B#16#56;
==I ;
SPBN A7f7;
SET ;
= L 2.5;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#1574.0];
UW W#16#FF;
T #GEO_PN.SUBNET;
L W [AR1,P#1576.0];
UW W#16#FF;
T #GEO_PN.RACK;
L D [AR1,P#1562.0];
T LD 52;
L D [AR1,P#1566.0];
T LD 56;
L D [AR1,P#1570.0];
T #TOP_SI.ZI2_3;
SPA A7f4;
A7f7: L #TOP_SI.NUM;
L B#16#53;
==I ;
SPBN A7f8;
SET ;
= L 2.3;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#1526.0];
UW W#16#FF;
T #GEO_PN.SUBNET;
L W [AR1,P#1528.0];
UW W#16#FF;
T #GEO_PN.RACK;
L W [AR1,P#1530.0];
T #GEO_PN.SLOT;
L W [AR1,P#1532.0];
T #GEO_PN.SUBSL_NO;
L D [AR1,P#1514.0];
T LD 52;
L D [AR1,P#1518.0];
T LD 56;
L D [AR1,P#1522.0];
T #TOP_SI.ZI2_3;
SPA A7f4;
A7f8: L #TOP_SI.NUM;
L B#16#64;
==I ;
SPBN A7f9;
SET ;
= L 2.7;
SPA A7f4;
A7f9: L #TOP_SI.NUM;
L B#16#46;
==I ;
SPBN A7fa;
SET ;
= L 2.0;
L DIW [AR2,P#1714.0];
T LW 142;
TAK ;
AUF DB [LW 142];
L DID [AR2,P#1716.0];
LAR1 ;
TAK ;
L W [AR1,P#48.0];
UW W#16#FF;
T #GEO_PN.SUBNET;
L W [AR1,P#50.0];
UW W#16#FF;
T #GEO_PN.RACK;
L D [AR1,P#36.0];
T LD 52;
L D [AR1,P#40.0];
T LD 56;
L D [AR1,P#44.0];
T #TOP_SI.ZI2_3;
SPA A7f4;
A7fa: L #TOP_SI.NUM;
L B#16#48;
==I ;
SPBN A7f4;
SET ;
= L 2.1;
SPA A7f4;
A7f4: CLR ;
U L 140.1;
SAVE ;
BE ;
END_FUNCTION_BLOCK
Code: Select all
{
Scl_ResetOptions ;
Scl_OverwriteBlocks := 'y' ;
Scl_GenerateReferenceData := 'y' ;
Scl_S7ServerActive := 'y' ;
Scl_CreateObjectCode := 'y' ;
Scl_OptimizeObjectCode := 'y' ;
Scl_MonitorArrayLimits := 'n' ;
Scl_CreateDebugInfo := 'n' ;
Scl_SetOKFlag := 'n' ;
Scl_SetMaximumStringLength := '254'
}
//------------------------------------------------------------------------------------------------------
// project name:
// file name : FB 1869
// library : Advanced Prozess Library V7.1
// system : PCS7
// version : 06.00.00
// application : @System
// restrictions:
// requirements: Mit der CFC-Funktion "Baugruppentreiber erzeugen" wird Folgendes automatisch ausgefuhrt:
// - Der Baustein wird in der Ablaufreihenfolge hinter dem RACK-Baustein eingebaut.
// - Der Eingang SLOT_NO (Steckplatznummer der Stromversorgung) wird parametriert.
// - Der Eingang EN wird mit dem Ausgang eines AND-Bausteins verschaltet.
// Dessen Eingange werden mit dem Ausgang EN_SUBx des OB_BEGIN-Bausteins, dem
// Ausgang EN_Rxxx des SUBNET-Bausteins und dem Ausgang EN_Mxx des RACKBausteins
// verschaltet.
// - Die OUT-Strukturen CPU_DIAG des OB_BEGIN-Bausteins und RAC_DIAG des RACKBausteins
// werden mit den gleichnamigen IN_OUT-Strukturen des PS-Bausteins verschaltet.
//
// search items:
// functionality: Der Baustein PS überwacht den Zustand einer Stromversorgung eines Baugruppenträgers
// und meldet die zugehörigen Fehlerereignisse.
// ------------------------------------------------------------------------------------------------------
// change log table:
//
// version date expert in charge changes applied
//
// 8.7 17.07.2017 comatic - created -
// 8.7 24.07.2017 DLM - commented -
//
//=======================================================================================================
FUNCTION_BLOCK "A_MOD_D8_PN"
TITLE = 'PN Diagnostic Module Check (0 - 7 Channel)'
{ S7_hardware := 'sm'; S7_alarm_ui := '1'; S7_tasklist := 'OB1,OB82,OB83,OB85,OB100,OB86'; S7_tag := 'false' }
AUTHOR : DRIVER90
FAMILY : '@SYSTEM'
NAME : MOD_D8_P
VERSION : '9.0'
VAR_INPUT
LADDR { S7_link := 'false' }: INT ; //Logical Address of Module
LADDR1 { S7_link := 'false' }: INT ; //Logical Address of Module
SUBN_TYP { S7_link := 'false' }: BOOL ; //1=External PN-Interface
SUBN1_ID { S7_link := 'false' }: BYTE := B#16#FF; //ID of Primary Subnet
SUBN2_ID { S7_link := 'false' }: BYTE := B#16#FF; //ID of Redundant Subnet
RACK_NO { S7_link := 'false' }: BYTE ; //Rack Number
SLOT_NO { S7_link := 'false' }: BYTE ; //Slot Number
SUBSL_NO { S7_link := 'false' }: BYTE ; //Subslot Number
CHAN_NUM { S7_link := 'false' }: INT ; //Highest Channel Address
MODE_00 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 0
MODE_01 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 1
MODE_02 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 2
MODE_03 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 3
MODE_04 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 4
MODE_05 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 5
MODE_06 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 6
MODE_07 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Mode Channel 7
DELAY1 { S7_visible := 'false'; S7_link := 'false' }: INT := 2; //Alarm Delay 1 (s)
DELAY2 { S7_visible := 'false'; S7_link := 'false' }: INT := 2; //Alarm Delay 2 (s)
FEATURE_01 { S7_visible := 'false'; S7_link := 'false' }: WORD ; //Features of Hardware Paramter 01
FEATURE_02 { S7_visible := 'false'; S7_link := 'false' }: WORD ; //Features of Hardware Paramter 02
FEATURE_03 { S7_visible := 'false'; S7_link := 'false' }: WORD ; //Features of Hardware Paramter 03
FEATURE_04 { S7_visible := 'false'; S7_link := 'false' }: WORD ; //Features of Hardware Paramter 04
FEATURE_05 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 05
FEATURE_06 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 06
FEATURE_07 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 07
FEATURE_08 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 08
FEATURE_09 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 09
FEATURE_10 { S7_visible := 'false'; S7_link := 'false' }: DWORD ; //Features of Hardware Paramter 10
EV_ID1 { S7_visible := 'false'; S7_link := 'false'; S7_param := 'false'; S7_server := 'alarm_archiv'; S7_a_type := 'alarm_8p' }: DWORD ; //Event ID 1
EV_ID2 { S7_visible := 'false'; S7_link := 'false'; S7_param := 'false'; S7_server := 'alarm_archiv'; S7_a_type := 'alarm_8p' }: DWORD ; //Event ID 2
EN_MSG { S7_visible := 'false'; S7_link := 'false' }: BOOL := TRUE; //1=Enable Alarm
MS { S7_link := 'false'; S7_m_c := 'true' }: DWORD ; //Maintenance State
MS_REQ { S7_link := 'false'; S7_m_c := 'true' }: BOOL ; //Maintenance Release Request
DIAG_BUF { S7_visible := 'false' }: BOOL ; //1= CPU Diagnostic Buffer entry on (relevant for service personnel)
END_VAR
VAR_OUTPUT
QERR { S7_visible := 'false'; S7_dynamic := 'true' }: BOOL := TRUE; //1=Runtime Error
QRACKF { S7_dynamic := 'true' }: BOOL ; //1 = higher-level error
QMODF { S7_dynamic := 'true' }: BOOL ; //1=Module Removed / Out of Order
QPERAF { S7_dynamic := 'true' }: BOOL ; //1=Module I/O Access Failure
O_MS { S7_visible := 'false' }: DWORD ; //Maintenance State
CH_EXIST { S7_visible := 'false';
S7_m_c := 'true' } : DWORD; // Channel exist
CH_EXIST_byte AT CH_EXIST : ARRAY[0..3] OF BYTE;
CH_ACTIVE { S7_visible := 'false';
S7_m_c := 'true' } : DWORD; // Channel active
CH_ACTIVE_byte AT CH_ACTIVE : ARRAY[0..3] OF BYTE;
CH_OK { S7_visible := 'false';
S7_m_c := 'true' } : DWORD; // Channel OK
CH_OK_byte AT CH_OK : ARRAY[0..3] OF BYTE;
EXT_STAT { S7_visible := 'true';
S7_m_c := 'true' } : DWORD; // Maintenance Release - Extended Status
EXT_STAT_byte AT EXT_STAT : ARRAY[0..3] OF BYTE;
EXT_STAT_A { S7_visible := 'true'; S7_m_c := 'true' }: DWORD ; //Extended Status - Application
FS_ACTIVE { S7_visible := 'false'; S7_m_c := 'true' }: DWORD ; //Flatter supress active
DM_ACTIVE { S7_visible := 'false'; S7_m_c := 'true' }: DWORD ; //Delayed messaging active
OMODE_00 { S7_visible := 'false' }: DWORD ; //Mode Channel 0
OMODE_01 { S7_visible := 'false' }: DWORD ; //Mode Channel 1
OMODE_02 { S7_visible := 'false' }: DWORD ; //Mode Channel 2
OMODE_03 { S7_visible := 'false' }: DWORD ; //Mode Channel 3
OMODE_04 { S7_visible := 'false' }: DWORD ; //Mode Channel 4
OMODE_05 { S7_visible := 'false' }: DWORD ; //Mode Channel 5
OMODE_06 { S7_visible := 'false' }: DWORD ; //Mode Channel 6
OMODE_07 { S7_visible := 'false' }: DWORD ; //Mode Channel 7
DXCHG_00 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 0
DXCHG_01 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 1
DXCHG_02 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 2
DXCHG_03 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 3
DXCHG_04 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 4
DXCHG_05 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 5
DXCHG_06 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 6
DXCHG_07 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 7
DXCHG1_00 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 0
DXCHG1_01 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 1
DXCHG1_02 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 2
DXCHG1_03 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 3
DXCHG1_04 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 4
DXCHG1_05 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 5
DXCHG1_06 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 6
DXCHG1_07 { S7_visible := 'false' }: DWORD ; //Bidirectional data exchange Channel 7
MS_XCHG_00 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 0
MS_XCHG_01 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 1
MS_XCHG_02 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 2
MS_XCHG_03 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 3
MS_XCHG_04 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 4
MS_XCHG_05 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 5
MS_XCHG_06 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 6
MS_XCHG_07 { S7_visible := 'false' }: DWORD ; //MS exchange Channel 7
MSGSTAT1 { S7_visible := 'false' }: WORD ; //Message Failure 1
MSGSTAT2 { S7_visible := 'false' }: WORD ; //Message Failure 2
MSG_ACK1 { S7_visible := 'false' }: WORD ; //Message Acknowledged 1
MSG_ACK2 { S7_visible := 'false' }: WORD ; //Message Acknowledged 2
MOD_INF { S7_visible := 'false' }: STRUCT
SUBN_ID : BYTE ; //Subnet Number
RACK_NO : BYTE ; //Rack Number
SLOT_NO : BYTE ; //Slot Number
SUBSL_NO : BYTE ; //Subslot Number
BASADR : WORD ; //Base Address
EXPECTYP : WORD ; //Expected Module Type
ACTTYP : WORD ; //Actual Module Type
RESERVE : WORD ; //Reserved
IOSTAT : BYTE ; //Data ID of Logical Address
IOSTAT_0 : BOOL ; //1=Module Fault
IOSTAT_1 : BOOL ; //1=Module Exists
IOSTAT_2 : BOOL ; //1=Module Removed
IOSTAT_3 : BOOL ; //Reserved
IOSTAT_4 : BOOL ; //Reserved
IOSTAT_5 : BOOL ; //1=Module can be Host for Submodule
IOSTAT_6 : BOOL ; //Reserved for S7-400
IOSTAT_7 : BOOL ; //1=Module on Local Bus Segment
AREA_ID : WORD ; //Area ID
END_STRUCT ;
DIAG_INF { S7_visible := 'false' } : "DIAG_INF" ;
DIAG_INF_AR AT DIAG_INF : ARRAY[0..1431] OF BYTE;
GET_DIAG_AR AT DIAG_INF : STRUCT
HEADER_INFO : ARRAY[0..12] OF WORD;
ALARM_INFO : ARRAY[0..702] OF WORD;
END_STRUCT;
END_VAR
VAR_IN_OUT
CPU_DIAG_PN : "CPU_DIAG_PN" ;
RAC_DIAG : "RAC_DIAG" ;
CPU_DIAG_PN_AR AT CPU_DIAG_PN : ARRAY[0..1423] OF BYTE;
ACC_MODE { S7_link := 'false' } : BOOL ; //1=Accept New Mode Settings
END_VAR
VAR
sdwRESERVE1 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE2 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE3 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE4 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE5 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE6 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE7 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE8 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE9 : DWORD ; //Reserve für zukünftige Änderungen
sdwRESERVE10 : DWORD ; //Reserve für zukünftige Änderungen
swHART_DIAG_RALRM : WORD ;
swHART_DIAG_RDREC : WORD ;
LADDR_BASIS : INT ; //Basisadresse der Baugruppe wird aus LADDR und LADDR1 bestimmt
siBeginChannelType : INT ; //wird benötigt für weitere Kanaltypen
siBeginChannelDiag : INT ; //wird benötigt für weitere Kanaltypen
sbFurtherChannelType : BOOL ; //wird benötigt für weitere Kanaltypen
sbFurtherChannelTypeSC : BOOL ; //weiterer Kanaltyp aber gleiche Kanäle wie der vorhergehende Kanaltyp
sbOB83CheckFWUpdate : BOOL ; //Bei spez. Hart Baugruppen muß wegen mögl.FW Update bei gehendem OB83 Dignose im
sbyChannelType : BYTE ; //wird benötigt für weitere Kanaltypen
sbyDiagnosticBitsPerChn : BYTE ; //wird benötigt für weitere Kanaltypen
sbyNumberOfChn : BYTE ; //wird benötigt für weitere Kanaltypen
sbyChnVector1 : BYTE ; //wird benötigt für weitere Kanaltypen
sbyChnVector2 : BYTE ; //wird benötigt für weitere Kanaltypen
sbyChnVector3 : BYTE ; //wird benötigt für weitere Kanaltypen
OB82_CNT : INT ; //OB82 Aufrufzähler
LOCK_82_TM : DINT ; //Wartezeit OB82
ID : STRUCT
IOTYP : BYTE := B#16#FF; //Ein- oder Ausgabemodul
BG300 : BOOL ; //1: S7-300 - Modul 16 Bit
HART : BOOL ; //1: HART - Modul
CHECK : BOOL ; //Konfiguration OK?
END_STRUCT ;
RQ : STRUCT
PARA : BOOL ; //Parametrierung angefordert / läuft
DIAG : BOOL ; //Diagnose angefordert / läuft
CHRS : BOOL ; //Kanalfehler löschen
OB1PARA : BOOL ; //OB1 liest Parametrierung
OB1DIAG : BOOL ; //OB1 liest Diagnosedaten
PRIO28 : BOOL ; //Unterbrechung mit PRIO 28
OB1INT : BOOL ; //OB1 während Parametrierung oder Diagnose unterbrochen?
END_STRUCT ;
MODF : STRUCT
BG : BOOL ; //Baugruppenfehler
ZS : BOOL ; //Baugruppe gezogen
ZSMEL : BOOL ; //Baugruppe gezogen melden // 2.8.2001 SCH
FBG : BOOL ; //Falsche Bauruppe //2.8.2001 SCH
ACC : BOOL ; //Peripheriezugriffsfehler
X1 : BOOL ; //Maintenance Demand/ uncertain
X2 : BOOL ; //reserve Alarm8p Signal 8
END_STRUCT ;
MODF_MESG : STRUCT
BG : BOOL ; //Baugruppenfehler
ZS : BOOL ; //Baugruppe gezogen
ZSMEL : BOOL ; //Baugruppe gezogen melden // 2.8.2001 SCH
FBG : BOOL ; //Falsche Bauruppe //2.8.2001 SCH
ACC : BOOL ; //Peripheriezugriffsfehler
X1 : BOOL ; //Maintenance Demand/ uncertain
X2 : BOOL ; //reserve Alarm8p Signal 8
END_STRUCT ;
sMODF_MESG : STRUCT
BG : BOOL ; //Baugruppenfehler
ZS : BOOL ; //Baugruppe gezogen
ZSMEL : BOOL ; //Baugruppe gezogen melden // 2.8.2001 SCH
FBG : BOOL ; //Falsche Bauruppe //2.8.2001 SCH
ACC : BOOL ; //Peripheriezugriffsfehler
X1 : BOOL ; //Maintenance Demand/ uncertain
X2 : BOOL ; //reserve Alarm8p Signal 8
END_STRUCT ;
T_CH2 : ARRAY [0 .. 7 ] OF //Kanalfehlertext alarm8p 2
INT ; //Kanalfehlertext alarm8p 2
TX_NR : ARRAY [0 .. 31 ] OF //Fehlertext_Nummer
INT := 1, 2, 3, 4, 5, 6, 7, 8; //Fehlertext_Nummer
siDiagBit : INT := 7; //Anzahl der ausgewerteten Diagnose Bits
sdwDiagBitAllocation : DWORD ; //Diagnosebits des Kanals in einem DWORD
T_BG_ZS : INT ; //Ziehen Stecken Fehlertextnummer 4.5 Schultz
T_BG_F : INT ; //Baugruppenfehler Fehlertextnummer 4.5 Schultz
CH_VECT : BYTE ; //Kanalfehlervektor 1 und 2
CH_VECT_MESG : BYTE ; //Kanalfehlervektor 1
sCH_VECT : BYTE ;
sbCH_VECT_MESG1 : BYTE ; //letztes Kanalfehlervektor 1
sbCH_VECT_MESG2 : BYTE ; //letztes Kanalfehlervektor 2
DEL_CNT_MESG : ARRAY [0 .. 7 ] OF //Verzögerung (ms)
DINT ; //Verzögerung (ms)
DEL_TIM_MESG : ARRAY [0 .. 7 ] OF //Verzögerung (ms)
DINT ; //Verzögerung (ms)
DEL_ACT_MESG : ARRAY [0 .. 7 ] OF BOOL ;
DEL_CNT_MESG_MODF_ZSMEL : DINT ;
DEL_CNT_MESG_MODF_BG : DINT ;
DEL_CNT_MESG_MODF_FBG : DINT ;
DEL_CNT_MESG_MODF_X1 : DINT ;
DEL_TIM_MESG_MODF_ZSMEL : DINT ;
DEL_TIM_MESG_MODF_BG : DINT ;
DEL_TIM_MESG_MODF_FBG : DINT ;
DEL_TIM_MESG_MODF_X1 : DINT ;
DEL_ACT_MESG_MODF_ZSMEL : BOOL ;
DEL_ACT_MESG_MODF_BG : BOOL ;
DEL_ACT_MESG_MODF_FBG : BOOL ;
DEL_ACT_MESG_MODF_X1 : BOOL ;
DEL_CNT_MESG_MaintAlarm : DINT ;
DEL_CNT_MESG_MaintWarn : DINT ;
DEL_CNT_MESG_MaintReqst : DINT ;
DEL_TIM_MESG_MaintAlarm : DINT ;
DEL_TIM_MESG_MaintWarn : DINT ;
DEL_TIM_MESG_MaintReqst : DINT ;
DEL_ACT_MESG_MaintAlarm : BOOL ;
DEL_ACT_MESG_MaintWarn : BOOL ;
DEL_ACT_MESG_MaintReqst : BOOL ;
sbCH_VECT1 : BYTE ; //Kanalfehlervektor 1
sbMODFZS : BOOL ; //Letztes gemeldetes ZS-Ereignis
sbMODFBG : BOOL ; //Letztes gemeldetes BG-Ereignis
sbMODFFBG : BOOL ;
sbMODFX1 : BOOL ; //Maintenance Demand/ uncertain
sbMODFX2 : BOOL ; //reserve Alarm8p Signal 8
sbPERAF : BOOL ; //Letztes gemeldetes PERAF-Ereignis
OB82_SP : BOOL ; //Meldung OB82 gesperrt
sbOB82_SP : BOOL ; //Zustand Meldung OB82 gesperrt
INI_ALRM1 : BOOL := TRUE; //1=ALARM_8P_1 muß initialisiert werden
INI_ALRM2 : BOOL := TRUE; //1=ALARM_8P_2 muß initialisiert werden
KIR : BOOL ; //Konfiguration im Run
KIR_OLD : BOOL ; //Hilfsmerker Konfiguration im Run
sbRESTART : BOOL := TRUE;
DEL_ACT : BOOL ; //PERAF wird für übergeordneten Fehler verzögert
DEL_CNT : DINT ; //Verzögerung (ms)
DEL_TIM : DINT ; //Start der Verzögerung
DELAY : DINT ; //Eingestellte Verzögerung
bFlutterNotSet : BOOL := TRUE;
ALARM_8P_1 : "ALARM_8P"; //Multiinstanzierte ALARM_8P
ALARM_8P_2 : "ALARM_8P"; //Multiinstanzierte ALARM_8P
RDREC_1 : "RDREC"; //Multiinstanz SFB 52
sChNummer : INT ;
sbOB82BeforeOB83 : BOOL ;
-spam- : BOOL ;
sbUpdOMODEAftrRckRet : BOOL ;
sbMaintAlarm : BOOL ;
sbMaintWarn : BOOL ;
sbMaintReqst : BOOL ;
sbMaintAlarm_old : BOOL ;
sbMaintWarn_old : BOOL ;
sbMaintReqst_old : BOOL ;
sbMaintAlarm_MESG : BOOL ;
sbMaintWarn_MESG : BOOL ;
sbMaintReqst_MESG : BOOL ;
sbMaintAlarm_MESG_old : BOOL ;
sbMaintWarn_MESG_old : BOOL ;
sbMaintReqst_MESG_old : BOOL ;
sbIoModNotRed : BOOL ;
sbHwFwDiff : BOOL ;
sbIoModNotRed_old : BOOL ;
sbHwFwDiff_old : BOOL ;
END_VAR
VAR_TEMP
EN_OUTP : BOOL ; //Ausgänge freigeben
EN_ALRM : BOOL ; //Alarm_8P freigeben
sbRACKF : BOOL ; //Rackfehler
OB_START : WORD;
OBSTART AT OB_START : STRUCT
OB_70 : BOOL; // Ablauf im OB70 Peripherie-Redundanzfehler
OB_72 : BOOL; // Ablauf im OB72 CPU-Redundanzfehler
OB_82 : BOOL; // Ablauf im OB82 Dianose-Interrupt
OB_83 : BOOL; // Ablauf im OB83 Ziehen- Stecken Alarm
OB_85 : BOOL; // Ablauf im OB85 Zeitablauf Fehler
OB_86 : BOOL; // Ablauf im OB86 PN-IO Stationsausfall
OB_1 : BOOL; // Ablauf im OB1 Cyclical Prog
OB_100 : BOOL; // Ablauf im OB100 Restart
OB_3x : BOOL; // Ablauf im OB30 bis OB38
OB_NP : BOOL; // Ablauf im NP - Organization Block not provided
OB_80 : BOOL; // Ablauf im OB80 Zykluszeitüberschreitung
OB_81 : BOOL; // Ablauf im OB81
END_STRUCT;
RETURN_CODE : INT ; //Hilfsparameter (Wechselnde Bedeutung)!
CHANNELS : INT ; //Kanalanzahl der Baugruppe
CHANNELS_OFFSET : INT ; //Kanal Offset bei mehreren Kanaltypen mit weiteren Kanälen
X : INT ; //schleifenzähler für Texte für Begleitwerte
y : INT ; //temp Integer
Z : INT ; //temp Integer
SZL_HEADER : STRUCT
LENTHDR : WORD ;
N_DR : WORD ;
END_STRUCT ;
GEO_PN : STRUCT
SUBNET : BYTE ; //SUBNET belegt 1 WORD im Speicher!
RACK : BYTE ;
SLOT : WORD ;
SUBSL_NO : WORD ;
END_STRUCT ;
ZI1 : WORD ;
byQHL : BYTE ;
byQLL : BYTE ;
bMBSM : BOOL ;
bMBFM : BOOL ;
ZI2_3 : DWORD ;
ZI2_3_AR AT ZI2_3 : ARRAY[0..1] OF WORD;
CH_O : DWORD;
CH_O_bool AT CH_O : ARRAY[0..31] OF BOOL;
CH_O_byte AT CH_O : ARRAY[0..3] OF BYTE;
CH_E : DWORD ;
CH_E_bool AT CH_E : ARRAY[0..31] OF BOOL;
CH_E_byte AT CH_E : ARRAY[0..3] OF BYTE;
CH_A : DWORD;
CH_A_bool AT CH_A : ARRAY[0..31] OF BOOL;
CH_A_byte AT CH_A : ARRAY[0..3] OF BYTE;
EXT_S : DWORD ;
EXT_S_bool AT EXT_S : ARRAY[0..31] OF BOOL;
EXT_S_byte AT EXT_S : ARRAY[0..3] OF BYTE;
TOP_SI : STRUCT
EV_CLASS : BYTE ;
EV_NUM : BYTE ;
PRIORITY : BYTE ;
NUM : BYTE ;
TYP2_3 : BYTE ;
TYP1 : BYTE ;
ZI1 : WORD ;
ZI2_3 : DWORD ;
END_STRUCT ;
tdwMS_AS : DWORD ; //Maintenance State AS
tMS_XCHG : DWORD ; //Maintenance State AS
bTmpDXCHG : BOOL ; //BOOL für verrundung der DXCHG_xx 0 bit
bTmpFlutter : BOOL ; //BOOL für verrundung der DXCHG_xx 0 bit
tDXCHG : DWORD ;
MOD_INF_TEMP : STRUCT
SUBN_ID_RACK_NO : WORD ; //bei dezentralem Aufbau mit PROFINET IO: Bit 15 = 1 (PROFINET IO-Kennung), die l
SLOT_NO_SUBSL_NO : WORD ; //bei dezentralem Aufbau mit PROFINET IO: Steckplatznummer
BASADR : WORD ; //Base Address
EXPECTYP : WORD ; //Expected Module Type
ACTTYP : WORD ; //Actual Module Type
RESERVE : WORD ; //Reserved
IOSTAT : BYTE ; //Data ID of Logical Address
IOSTAT_0 : BOOL ; //1=Module Fault
IOSTAT_1 : BOOL ; //1=Module Exists
IOSTAT_2 : BOOL ; //1=Module Removed
IOSTAT_3 : BOOL ; //Reserved
IOSTAT_4 : BOOL ; //Reserved
IOSTAT_5 : BOOL ; //1=Module can be Host for Submodule
IOSTAT_6 : BOOL ; //Reserved for S7-400
IOSTAT_7 : BOOL ; //1=Module on Local Bus Segment
AREA_ID : WORD ; //Area ID
END_STRUCT ;
tMODE : DWORD ;
tModfBg : BOOL ;
intINDEX : INT ;
tiLen : INT ;
twHART_OB82 : WORD ;
twHART_OB1 : WORD ;
tbHART : BOOL ;
iRET_VAL : INT ;
wINFO1 : WORD ;
dwINFO2 : DWORD ;
MODF_BG_GONE : BOOL ;
tbCondMon : BOOL ;
tdwDXCHG1 : DWORD ;
tbMaintAlarm : BOOL ;
tbMaintWarn : BOOL ;
tbMaintReqst : BOOL ;
-spam- : BYTE ;
twTextRef : WORD ;
twChnNum_OB82 : WORD ;
twErrStat_OB82 : WORD ;
twErrTyp_OB82 : WORD ;
twChnNum_OB1 : WORD ;
twErrStat_OB1 : WORD ;
twErrTyp_OB1 : WORD ;
END_VAR
BEGIN
//generiert vom SCL Übersetzer Version: SCLCOMP K05.06.00.00_06.01.00.01 release
EN_OUTP := FALSE;
EN_ALRM := FALSE;
sbRACKF := FALSE;
// NUM := B#16#0;
OB_START := W#16#0;
RETURN_CODE := 0;
CHANNELS := 0;
CHANNELS_OFFSET := 0;
X := 0;
y := 0;
Z := 0;
SZL_HEADER.LENTHDR := W#16#0;
SZL_HEADER.N_DR := W#16#0;
GEO_PN.SUBNET := B#16#0;
GEO_PN.RACK := B#16#0;
GEO_PN.SLOT := B#16#0;
GEO_PN.SUBSL_NO := B#16#0;
ZI1 := W#16#0;
byQHL := B#16#0;
byQLL := B#16#0;
bMBSM := 0;
bMBFM := 0;
ZI2_3 := DW#16#0;
CH_O := DW#16#0;
CH_E := DW#16#0;
CH_A := DW#16#0;
EXT_S := DW#16#0;
TOP_SI.EV_CLASS := B#16#0;
TOP_SI.EV_NUM := B#16#0;
TOP_SI.PRIORITY := B#16#0;
TOP_SI.NUM := B#16#0;
TOP_SI.TYP2_3 := B#16#0;
TOP_SI.TYP1 := B#16#0;
TOP_SI.ZI1 := W#16#0;
TOP_SI.ZI2_3 := DW#16#0;
//wQHL := W#16#0;
//wQLL := W#16#0;
tdwMS_AS := W#16#0;
tMS_XCHG := W#16#0;
bTmpDXCHG := FALSE;
bTmpFlutter := FALSE;
tDXCHG := FALSE;
MOD_INF_TEMP.SUBN_ID_RACK_NO := W#16#0;
MOD_INF_TEMP.SLOT_NO_SUBSL_NO := W#16#0;
MOD_INF_TEMP.BASADR := W#16#0;
MOD_INF_TEMP.EXPECTYP := W#16#0;
MOD_INF_TEMP.ACTTYP := W#16#0;
MOD_INF_TEMP.RESERVE := W#16#0;
MOD_INF_TEMP.IOSTAT := B#16#0;
MOD_INF_TEMP.IOSTAT_0 := FALSE;
MOD_INF_TEMP.IOSTAT_1 := FALSE;
MOD_INF_TEMP.IOSTAT_2 := FALSE;
MOD_INF_TEMP.IOSTAT_3 := FALSE;
MOD_INF_TEMP.IOSTAT_4 := FALSE;
MOD_INF_TEMP.IOSTAT_5 := FALSE;
MOD_INF_TEMP.IOSTAT_6 := FALSE;
MOD_INF_TEMP.IOSTAT_7 := FALSE;
MOD_INF_TEMP.AREA_ID := W#16#0;
tMODE := FALSE;
tModfBg := FALSE;
intINDEX := 0;
tiLen := 0;
twHART_OB82 := W#16#0;
twHART_OB1 := W#16#0;
tbHART := FALSE;
iRET_VAL := 0;
wINFO1 := W#16#0;
dwINFO2 := DW#16#0;
MODF_BG_GONE := FALSE;
//tbCentralOneSideFail := FALSE;
tbCondMon := FALSE;
tdwDXCHG1 := FALSE;
tbMaintAlarm := FALSE;
tbMaintWarn := FALSE;
tbMaintReqst := FALSE;
-spam- := B#16#0;
twTextRef := W#16#0;
twChnNum_OB82 := W#16#0;
twErrStat_OB82 := W#16#0;
twErrTyp_OB82 := W#16#0;
twChnNum_OB1 := W#16#0;
twErrStat_OB1 := W#16#0;
twErrTyp_OB1 := W#16#0;
CASE CPU_DIAG_PN.OB_S.NUM_CNT OF
1 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_01;
2 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_02;
3 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_03;
4 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_04;
5 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_05;
6 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_06;
7 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_07;
8 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_08;
9 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_09;
10 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_10;
11 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_11;
12 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_12;
13 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_13;
14 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_14;
15 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_15;
16 :
TOP_SI.NUM := CPU_DIAG_PN.OB_S.NUM_16;
ELSE;
END_CASE;
(** Ablauf-OB bestimmen **)
IF TOP_SI.NUM = B#16#1 THEN
(* Bit im Status besetzen *)
OBSTART.OB_1 := TRUE; //
(* Sonderbehandlung beim Ablauf im OB1 *)
sbRACKF := RAC_DIAG.RACK_ERR;
IF sbRACKF <> QRACKF THEN
IF SUBN1_ID = B#16#FF THEN
ACC_MODE := NOT sbRACKF;
END_IF;
QRACKF := sbRACKF;
END_IF;
ELSIF TOP_SI.NUM = B#16#55 THEN
OBSTART.OB_85 := TRUE;
(* Ablauf im OB85 Programmablauffehler *)
GEO_PN.SUBNET := WORD_TO_BYTE(CPU_DIAG_PN.OB_85.SUBNET);
GEO_PN.RACK := WORD_TO_BYTE(CPU_DIAG_PN.OB_85.RACK);
GEO_PN.SLOT := CPU_DIAG_PN.OB_85.SLOT;
GEO_PN.SUBSL_NO := CPU_DIAG_PN.OB_85.SUBSL_NO;
TOP_SI.EV_CLASS := CPU_DIAG_PN.OB_85.TOP_SI.EV_CLASS;
ZI2_3 := CPU_DIAG_PN.OB_85.TOP_SI.ZI2_3;
ELSIF TOP_SI.NUM = B#16#52 THEN
OBSTART.OB_82 := TRUE;
(* Ablauf im OB82 Diagnose-Alarm *)
GEO_PN.SUBNET := WORD_TO_BYTE(CPU_DIAG_PN.OB_82.SUBNET);
GEO_PN.RACK := WORD_TO_BYTE(CPU_DIAG_PN.OB_82.RACK);
GEO_PN.SLOT := DWORD_TO_WORD(SHR(IN:=(CPU_DIAG_PN.OB_82.AINFO.SLOT_SUBSLOT_NO AND DW#16#FFFF0000),N:=16));
GEO_PN.SUBSL_NO := DWORD_TO_WORD(SHL(IN:=(CPU_DIAG_PN.OB_82.AINFO.SLOT_SUBSLOT_NO AND DW#16#FFFF),N:=16));
TOP_SI := CPU_DIAG_PN.OB_82.TOP_SI;
//TOP_SI.ZI2_3 := CPU_DIAG_PN.OB_82.TOP_SI.ZI2_3;
ELSIF TOP_SI.NUM = B#16#56 THEN
OBSTART.OB_86 := TRUE;
(* Ablauf im OB86 Baugruppenträgerausfall *)
GEO_PN.SUBNET := WORD_TO_BYTE(CPU_DIAG_PN.OB_86.SUBNET);
GEO_PN.RACK := WORD_TO_BYTE(CPU_DIAG_PN.OB_86.RACK);
TOP_SI := CPU_DIAG_PN.OB_86.TOP_SI;
//TOP_SI.ZI2_3 := CPU_DIAG_PN.OB_86.TOP_SI.ZI2_3;
ELSIF TOP_SI.NUM = B#16#53 THEN
OBSTART.OB_83 := TRUE;
(* Ablauf im OB83 Ziehen / Stecken Alarm *)
GEO_PN.SUBNET := WORD_TO_BYTE(CPU_DIAG_PN.OB_83.SUBNET);
GEO_PN.RACK := WORD_TO_BYTE(CPU_DIAG_PN.OB_83.RACK);
GEO_PN.SLOT := CPU_DIAG_PN.OB_83.SLOT;
GEO_PN.SUBSL_NO := CPU_DIAG_PN.OB_83.SUBSL_NO;
TOP_SI := CPU_DIAG_PN.OB_83.TOP_SI;
//TOP_SI.ZI2_3 := CPU_DIAG_PN.OB_83.TOP_SI.ZI2_3;
ELSIF TOP_SI.NUM = B#16#64 THEN
OBSTART.OB_100 := TRUE;
(* Ablauf im OB100 *)
ELSIF TOP_SI.NUM = B#16#46 THEN
OBSTART.OB_70 := TRUE;
(* Ablauf im OB70 Peripherie-Redundanzfehler *)
GEO_PN.SUBNET := WORD_TO_BYTE(CPU_DIAG_PN.OB_70.SUBNET);
GEO_PN.RACK := WORD_TO_BYTE(CPU_DIAG_PN.OB_70.RACK);
TOP_SI := CPU_DIAG_PN.OB_70.TOP_SI;
ELSIF TOP_SI.NUM = B#16#48 THEN
OBSTART.OB_72 := TRUE;
(* Ablauf im OB72 CPU-Redundanzfehler *)
ELSE
;
END_IF;
There is no system functions calls, no other function calls, no loops, nothing. Only Acces to some call-by-reference values, given by an IN_OUT_VAR. Your programm fail alredy there.
Re: STL to SCL conversion
Posted: Fri Jan 17, 2020 12:56 am
by stl2sclSupport
At a minimum, you should create your STL code taking into account the options described by us at the beginning of the topic. This needs to be done because the converter expects absolute addressing. If you do this, "ALARM_8P" will be converted to SFB 35, and will be correctly interpreted by the converter. The same applies to the large file provided here and sent to us by mail. If the recognition is still not correct, write)
SFC6 is supported.
As mentioned above, try to create STL code taking into account the options described by us at the beginning of the topic.
Code: Select all
SFB00_CTU
SFB01_CTD
SFB02_CTUD
SFB03_TP
SFB04_TON
SFB05_TOF
SFB08_USEND
SFB09_URCV
SFB12_BSEND
SFB13_BRCV
SFB14_GET
SFB15_PUT
SFB16_PRINT
SFB19_START
SFB20_STOP
SFB21_RESUME
SFB22_STATUS
SFB23_USTATUS
SFB29_HS_COUNT
SFB30_FREQ_MES
SFB31_SEND_PTP
SFB33_ALARM
SFB34_ALARM_8
SFB35_ALARM_8P
SFB36_NOTIFY
SFB37_AR_SEND
SFB38_HSC_A_B
SFB39_POS
SFB41_CONT_C
SFB42_CONT_S
SFB52_RDREC
SFB53_WRREC
SFB54_RALRM
SFB73_RCVREC
SFB74_PRVREC
SFC1
SFC13
SFC14
SFC15
SFC17
SFC18
SFC20
SFC21
SFC22
SFC23
SFC24
SFC27
SFC28
SFC29
SFC30
SFC31
SFC5
SFC52
SFC6
SFC64
IN_OUT variables (including structure type variables) are supported. Try to create STL code taking into account the options described by us at the beginning of the topic.
Re: STL to SCL conversion
Posted: Fri Jan 17, 2020 6:29 am
by Draco Malfoy
You may not understand the sense of a recompiler. I cannot create a STL Code, because the STL Code is generated by the Origin of a closed library, or, for example, the original source file ist lost. I need a recompiler to restore the Source File, or, at least, something similar i.e. nearly identical, but without comments in the file.
Therefore, you recompiler should be able to recognize the options, with witch the original code was created, and then reverse it correctly.
Nevertheless, you was able to recompile the Sample Code i send to you, or not ? Can you post the result here or give me Feedback by Email ? I would like to compare you result with my origin.
I mean, the SFC51 is one of the most important system functions, witch is explicit not supported by yours. It has considerably more relevance in the praxis, than an SFC31, or SFB38, or SFB30.
Re: STL to SCL conversion
Posted: Fri Jan 17, 2020 12:18 pm
by stl2sclSupport
Ok, let's say you have an SCL block whose source has been lost. From this block, using the Simatic Manager tools, you can make several different AWL sources using the various settings of Simatic Manager. You can use absolute or symbolic addressing to generate an AWL file. For the converter to work properly, absolute addressing is required. Such a required AWL file can be generated from any previously compiled SCL block.
The above files, including your large file, cannot be converted correctly until you recreate the AWL file using the required settings.
Please check the procedure preparing the file for decompilation.
1. Open the SIMATIC Manager, open your project,
2. Open the block using the STL editor, select Options-> Customize in the upper pane of the editor window. In the window that opens, go to the Sources tab, and check the boxes as in the picture. Then click OK.
3. Save the open file using the key combination Ctrl + S (or via the menu File-> Save). Warning will appear that the language of the block will be changed. Click Yes.
4. Go to the Sources folder of your project. There you should see the source code generated by you in STL, with the necessary type of addressing.
Well, we plan to expand the list of supported SFB and SFC in the near future
Re: STL to SCL conversion
Posted: Fri Jan 17, 2020 1:43 pm
by Draco Malfoy
Ok, now I know, what you mean. This Option will only change the symbolical names of the called SFCs/SFBs to the absolute names. Lets try again:
https://mega.nz/#!RcNAmIjZ!8dCVX5kKmZS- ... URQRaOqSrI
Can you recompile it with your tool ? Still does not work automatically, may be because of using SFC51 inside of the code.
I have now eliminated the SFC51 Calls from the STL Source, its still not successful. Tried now with different samples, with absolute SFB/SFC Names and without SFC51 Calls. Still no result. Internal Server Error.
One Question:
Code: Select all
FUNCTION_BLOCK FB 3
TITLE =PN Diagnostic Module Check (0 - 7 Channel)
{ S7_hardware := 'sm'; S7_alarm_ui := '1'; S7_tasklist := 'OB1,OB82,OB83,OB85,OB100,OB86'; S7_tag := 'false' }
AUTHOR : DRIVER90
FAMILY : '@SYSTEM'
NAME : MOD_D8_P
VERSION : 9.0
VAR_INPUT
... SEE ATTACH ...
END_VAR
BEGIN
NETWORK
TITLE =SCL Netzwerk
//generiert vom SCL Übersetzer Version: SCLCOMP K05.06.00.00_11.01.00.01 release
SET ;
SAVE ;
= L 140.1;
CLR ;
L #TOP_SI.EV_CLASS;
L B#16#39;
==I ;
U L 2.2;
L #twChnNum_OB82;
L W#16#8000;
UW ;
L W#16#8000;
= L 140.2;
==I ;
L #twErrTyp_OB82;
L W#16#121;
= L 140.3;
==I ;
= L 140.4;
U L 2.2;
NOT ;
L #twErrTyp_OB1;
L W#16#121;
= L 140.5;
==I ;
U L 140.5;
O L 140.4;
NOT ;
U L 140.3;
L DIW [AR2,P#308.0];
L W#16#3;
UW ;
L W#16#3;
= L 140.3;
==I ;
L #FEATURE_05;
L DW#16#241670;
= L 140.4;
==D ;
U L 140.4;
O L 140.3;
U L 140.2;
SPBN A7d1;
SET ;
= #MODF.BG;
A7d1 : CLR;
U L 140.1;
SAVE ;
BE ;
END_FUNCTION_BLOCK
Code: Select all
<...>
END_VAR
BEGIN
MODF.BG:=TRUE;
END_FUNCTION_BLOCK
Sorry, but you mean not, there is "something rotten in the state of denmark" ?
Re: STL to SCL conversion
Posted: Mon Jan 20, 2020 12:44 pm
by Draco Malfoy
Dear Sirs,
Should i expect any response from you, or not ?
Re: STL to SCL conversion
Posted: Mon Jan 20, 2020 4:25 pm
by stl2sclSupport
1. We updated the online demo version, now all SFB and SFC are supported.
2. For correct operation of the converter, use English mnemonics.
3. Our converter translates files of limited complexity. So, for example, only simple indirect addressing options are supported.
The file you are trying to translate contains currently unsupported indirect addressing options.
Re: STL to SCL conversion
Posted: Mon Jan 20, 2020 6:09 pm
by Draco Malfoy
Im Sorry, but what exacley are you mean with "indirect addressing options" ?? Please an Example in the SCL Source.
The File, witch i'm trying to translate ist working only with structured operands, witch are represented by IN_OUT_VAR as a structure / UDT. There is nothing like "DBX.DBDYY" or so.
Code: Select all
MODF_BG_GONE :=
((TOP_SI.EV_CLASS = B#16#39 AND OBSTART.OB_82 AND ((twChnNum_OB82 AND W#16#8000) = W#16#8000))
AND
((twErrStat_OB82 AND W#16#1800) = W#16#1800)
AND NOT
(FEATURE_01 = W#16#1) OR MODF_BG_GONE) OR (
((TOP_SI.EV_CLASS = B#16#39) AND OBSTART.OB_82) AND ((twChnNum_OB82 AND W#16#8000) = W#16#8000)
AND
((twErrStat_OB82 AND W#16#1800) = W#16#1000) AND ((CPU_DIAG_PN.OB_82.TOP_SI.ZI2_3 AND DW#16#1000000) = DW#16#1000000));
Witch kind of operations from the example above is not supported by your programm ? Anyway, how i should use your programm, if i dont have the exact information aboout witch adressing options was used in the original source ??
stl2sclSupport wrote: ↑Fri Jan 17, 2020 12:56 am
IN_OUT variables (including structure type variables) are supported.
So, whats the true ? Supported or not supported ?
2. For correct operation of the converter, use English mnemonics.
Tryed now witch different code sequences and many options, in the english mnemonics. Your shit still does not work. I have no idea, how to use your programm, in order to help me by reversing of Blocks. I see actually no one single benefit from it.
Re: STL to SCL conversion
Posted: Wed Jan 22, 2020 3:49 pm
by stl2sclSupport
Surely you have several files for conversion. Send us a few of them that are minimal in terms of the amount of clean code (here, by clean code we mean code without a var section).
Re: STL to SCL conversion
Posted: Wed Jan 22, 2020 6:31 pm
by Draco Malfoy
Yes, i have. Should i send it by Email or upload here on mega ?
Re: STL to SCL conversion
Posted: Thu Jan 23, 2020 1:47 am
by stl2sclSupport
Regarding your files, we suggest continuing the dialogue by e-mail.
Re: STL to SCL conversion
Posted: Thu Jan 23, 2020 4:50 pm
by Draco Malfoy
Re: STL to SCL conversion
Posted: Thu Jan 23, 2020 5:47 pm
by stl2sclSupport
No, we are in no way associated with the mentioned project.
Re: STL to SCL conversion
Posted: Tue Feb 04, 2020 1:10 am
by Draco Malfoy
For all 3rd Party users here:
We have now the following fixing from this epic story: The Product placed above, is - once again - a not working trial, witch is not able to decompile a real code with some more or less complexity, and we are still wayting for a propper solution from the professional side.
Whereas, the unnamed ladies and gentleman from the unnamed firma behind of the stl2scl Projects, offer an offline reversing Service, for a very cheap price. I think, if i've sold out my House, i in fact may be able to buy one or two reversed blocks there.
Re: STL to SCL conversion
Posted: Tue Feb 04, 2020 6:42 am
by Dfcz
Прям такое кино развели. Концовка не понравилась, сори.
Re: STL to SCL conversion
Posted: Tue Feb 04, 2020 4:40 pm
by Draco Malfoy
Dfcz wrote: ↑Tue Feb 04, 2020 6:42 am
Прям такое кино развели. Концовка не понравилась, сори.
А что вам именно не понравилось ? Предприимчивые ребята решили капусты срубить на "тупых пиндосах", видимо. Здесь однако люди тоже не лыком шиты. Какой ещё смысл вот так юродствовать, чтобы потом признаться, что продукт дерьмо (я извиняюсь, ограниченно функционален !) и типо давай денюжку, цыганочка погадает ?
Re: STL to SCL conversion
Posted: Tue Feb 04, 2020 4:49 pm
by sania
I was waiting for this result.
we running this forum with out any ads and not request any pay ment about using .
In our site free of charge utilities permited ONLY.
anyone want money? not here!
I will delete this user with all messages.
Re: STL to SCL conversion
Posted: Tue Feb 04, 2020 4:54 pm
by Draco Malfoy
Please, not. Do not remove the messages. Because, i mean, its a good example to learn how it should not be and an good example for an inappropriate product placement.
Re: STL to SCL conversion
Posted: Wed Feb 05, 2020 12:42 am
by stl2sclSupport
Let's clarify the situation for administration of this forum. Our service is working for FREE on it's demo part. And any user can convert any STL files without any pay-ments. We have pretty big test base with more than 500 different STL files which are pretty complicated so we are sure that many will find it useful. And again it's available for free.
But in real life we can't guarantee that service will work without errors since there may be situations that we did not take into account, compiler versions for which we did not test, as well as just bugs in the code. We are constantly working to improve the service, including its free part but still can't provide 100% guarantees for all cases. That's why we offer paid services when engineers manually check the code and fix bugs. That's what happened with a code Draco Malfoy tries to convert: we found a problem in our code which doesn't allow service to translate his code fully automaticly. And we offer him our paid services.
We hope that our service will be heplful for the community. And this thread is also useful because seems like it's unclear for the users how to properly upload files in a free service part to get a result and thread clarifies some points.
Best regards, stl2scl team.
Re: STL to SCL conversion
Posted: Wed Feb 05, 2020 10:46 pm
by Draco Malfoy
Вы кажется вообще не понимаете об чём речь ведётся. Дело не в "затее с ковертированием" а в восстановлении утерянных исходников.
Re: STL to SCL conversion
Posted: Fri Feb 07, 2020 5:04 pm
by sania
I think is , very nice will to be if you are publish your demo utility for using offline and into program you are can put link to your site and mail for support.
and for additional super very nice if you are publish source code, maybe anyone can check and recommend something for your code...
P.S. I has not banned directly regarding you are have free option only.( you can refer by this link:
viewtopic.php?f=31&t=27003 )
Re: STL to SCL conversion
Posted: Mon Jul 26, 2021 9:26 am
by Draco Malfoy
Dear Sirs and Ladys,
i want to give a feedback to this project.
We have some different fixings there:
1. The actually, new version of the online-availible Recompiler is mutch more beter than the previsuos one. I was indeed able to recompile some blocks with more or less komplexity.
2. There are still a lot of problems, witch leads to the impossibility of compilation of the resultet SCL Code.
For example:
Code: Select all
IF FEATURE_01 = W#16#2
THEN
T_CH2[X * 2) + DWORD_TO_DINT(DW#16#0]:=82;
T_CH2[X * 2 + 1) + DWORD_TO_DINT(DW#16#0]:=82;
ELSE
T_CH2[X]:=82;
END_IF;
>>>>>Somebody removed the CRLF Tags, in the originally it was less redable >>>>>>>>>>>>>>>>>
In this example
T_CH2[X * 2) + DWORD_TO_DINT(DW#16#0]:=82; its clearly to see that the ")" and "]" operators are displaced witch make the compilation impossible.
The second problem is, the Statement
DWORD_TO_DINT(DW#16#0] is some internal remaining witch was not given in the originally code and doesnt make sense at all.
3. Next FIxing: in the compilat, the spring marks are totally different.
IF..ELSIF.. END_IF and IF...ELSE IF...END_IF; END_IF;-Statements are not differentiated and recognized correctly. The main point is, if you reverse
IF...ELSIF, the compiler spring over a mark number inside the compilat. Because of that spring, your recompiler should be able to differentiate the one from another.
4. The Statement
IF sbRACKF <> QRACKF THEN .... END_IF; will not be reversed correctly; The result is
IF (sbRACKF AND NOT QRACKF OR NOT sbRACKF AND QRACKF) THEN, witch is not true.
I recommend to get another bugfixing around with the blocks from the PCS7 Basic Library and publish a new version again.
Furthemore, it were interesting to understand, how much will be the licensing costs of the application.